ESP32 Bench
Boards: ESP32, S3, C3
Flash and monitor: Web Serial
← All errors

rst:0x7 (TG0WDT_SYS_RESET) and rst:0x8 (TG1WDT_SYS_RESET)

Resets and powerRecognised by the crash translator

What it looks like

rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
rst:0x8 (TG1WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)

What it means

A hardware watchdog timer reset the whole chip because the code stopped responding. TG0 is usually the task watchdog side, TG1 the interrupt watchdog. Unlike a panic, there may be no crash message before it.

Likely causes

  • A task or loop that never yields, so the watchdog is never fed.
  • Interrupts blocked for too long.
  • A deadlock: two tasks each waiting for a lock the other holds.

How to fix it

  1. Add delay(1) or yield() to long loops and timeouts to wait loops.
  2. Keep interrupt handlers short and never block inside them.
  3. Take locks in the same order everywhere to avoid deadlocks.

Paste your full log

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